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System on a chip
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211	Datasheet VCS AMS Mixed-Signal Verification Solution Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-03-06 15:46:48 Verilog-AMS SystemVerilog Verilog-A Verilog Synopsys SystemC Functional verification E System on a chip Electronic engineering Hardware description languages Electronic design automation
212	Expect a Breakthrough Advantage in NextGeneration FPGAs WP[removed]White Paper This white paper covers examples of why telecommunication bandwidth and the Add to Reading List Source URL: www.altera.com Language: English - Date: 2013-06-05 11:12:10 Altera Field-programmable gate array Application-specific integrated circuit Joint Test Action Group Parallel computing System on a chip Digital signal processing Interlaken Xilinx Electronic engineering Electronics Fabless semiconductor companies
213	Version 1.0, © Sept 2011, OCP-IP OCP-IP Network-on-chip benchmarking workgroup Erno Salminen, Tampere University of Technology Krishnan Srinivasan, Sonics Inc. Add to Reading List Source URL: ocpip.org Language: English - Date: 2011-01-20 18:38:07 Computer hardware Electronic design automation Network On Chip Open Core Protocol Embedded systems Benchmark System on a chip EEMBC Internet protocol suite Electronic engineering Electronics Integrated circuits
214	Workshop on Advanced Computer Architectures and Dependable Embedded Systems by Tallinn University of Technology Background: Innovative chip manufacturing technologies are the key enabling factors for modern IT systems. D Add to Reading List Source URL: 193.40.254.28 Language: English - Date: 2012-07-09 10:18:14 Digital electronics Electronic design automation Network On Chip System on a chip MPSoC Reconfigurable computing Embedded system MULTICUBE Advanced Learning and Research Institute Electronic engineering Electronics Microprocessors
215	Flexible Design and Integration Build Flexibility into Your Industrial Applications with FPGAs As designs for industrial systems become more complex, it’s no wonder Altera® FPGAs are playing a more central role. Incr Add to Reading List Source URL: www.altera.com Language: English - Date: 2011-02-18 02:42:23 Altera Field-programmable gate array Electronic design System on a chip Application-specific integrated circuit Embedded system Nios II Logic design Xilinx Electronic engineering Fabless semiconductor companies Electronics
216	Five Ways to Build Flexibility into Industrial Applications with FPGAs WP[removed]White Paper Add to Reading List Source URL: www.altera.com Language: English - Date: 2011-02-22 17:09:14 Nios II Field-programmable gate array Altera Sopc builder Coprocessor Application-specific integrated circuit Embedded system System on a chip Xilinx Electronic engineering Electronics Fabless semiconductor companies
217	CrossMark_Color_flat+click Add to Reading List Source URL: libna.mntl.illinois.edu Language: English - Date: 2014-07-01 18:39:30 Myosatellite cell Skeletal striated muscle Muscle contraction Muscle Cardiac muscle Tissue engineering Smooth muscle tissue Motor neuron Organ-on-a-chip Anatomy Biology Muscular system
218	WHITE PAPER March 2007 Near Field Communication in the real world – part III Moving to System on Chip (SoC) integration Add to Reading List Source URL: 67.222.41.204 Language: English - Date: 2013-12-19 02:35:32 Wireless Mobile telecommunications Near field communication Fabless semiconductor companies Bluetooth ATI Technologies System on a chip Microprocessor Application-specific integrated circuit Technology Electronic engineering Telecommunications engineering
219	IEEE Test Interface (STIL) and Memory Core Test Language - IEEE 1450™ Series (Bundle) The 1450 test interface (STIL) and Core Test language bundle provides an interface between digital test generation tools and test eq Add to Reading List Source URL: standards.ieee.org Language: English - Date: 2014-06-19 14:40:25 Manufacturing Microtechnology System on a chip Microprocessors Software testing Design for testing Automatic test equipment Electronic engineering Electronic design Design
220	Mixed Signal Design & Verification Methodology for Complex SoCs White Paper The contents of this document are owned or controlled by S3 Group and are protected under applicable copyright and/or Add to Reading List Source URL: www.s3group.com Language: English - Date: 2013-12-11 08:49:53 Electronic design Logic design Hardware verification languages Verilog-AMS Verilog System on a chip Electronic circuit simulation E Analog verification Electronic engineering Electronic design automation Hardware description languages

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